1. Field of the Invention
The present invention relates to an apparatus for receiving a wide-band pulse signal in a communication channel using a human body, and more particularly, to an apparatus for receiving a wide-band pulse signal in a communication channel using a human body, which is capable of performing high-speed communication with low power consumption using a wide-band symmetrical triggering technology using 50-Ω impedance matching, wide-band amplification and symmetrical threshold voltages, when the weak wide-band pulse signal output from the communication channel using the human body as a data transmission medium is restored to a digital signal.
2. Description of the Related Art
Recently, in a next-generation personal computer (PC) or a wearable computing system, studies on a communication channel using a human body as a data transmission medium are ongoing.
Since a human body has a component similar to a saline solution having 0.9% sodium chloride and a weak conductivity which varies depending on a frequency, the human body can transmit an electric signal. In addition, the human body has a loss of about 10 to 20 dB due to a resistive component of the human body.
When a digital signal is directly applied to the human body using a single signal electrode and 50-Ω transmission and reception impedances, a signal which is detected in a reception electrode includes positive and negative pulse signals having a width of about 5 to 10 ns without a DC offset. This is because the human body has a band-pass filter characteristic of about 100 MHz with respect to a single transmission/reception electrode as frequency characteristics, ground terminals of a transmission apparatus and a reception apparatus are separated from each other and a signal of less than 10 kHz and including a DC signal is not easily transmitted through the human body.
Since electric characteristics of the human body which appear when using the single signal electrode and the 50-Ω transmission and reception impedances are similar to the characteristics which appear in a capacitively coupled interface on a printed circuit board (PCB), a receiving method and apparatus used in a capacitively or AC coupled interface can be employed in even a communication channel using a human body as a data transmission medium.
Accordingly, a method and apparatus for restoring a pulse signal to a digital signal have been mainly used in the capacitively coupled interface which is developed for high-speed data transmission between chips mounted on the PCB.
Recently, a capacitive coupling interface for a high-speed memory bus I/O interface is registered by Perino (see Donald V. Perino, et al., “Integrated Circuit Device Having a Capacitive Coupling Element”, U.S. Pat. No. 6,854,030, Feb. 8, 2005, FIG. 15).
FIG. 1 is a circuit diagram of a pulse receiver using a comparator necessary for a capacitive coupling interface.
As shown, an input pulse signal is compared with negative and positive threshold voltages VRL and VRH using two comparators 10 and 11 and the output signals of the comparators 10 and 11 are sequentially selected by a multiplexor 12 using a clock signal of a flip-flop 14, thereby restoring the pulse signal to the digital signal. Then, a sampling circuit 16, which operates using the clock signal of the reception unit, converts the restored digital signal into a signal having a same phase as a clock signal of a reception unit.
Since the pulse receiver using the comparators has a simple circuit configuration, power consumed for restoring the pulse signal to the digital signal is low. However, the input pulse signal must have a DC bias and the threshold voltages VRL and VRH are further required.
In addition, the comparators which operate at a high speed and output the digital output signals are required. Since the comparator has restrictive hysteresis characteristics, there is a limitation in reception sensitivity.
Accordingly, in order to overcome the limitation in the reception sensitivity, an interface technology using a receiver having high reception sensitivity is published by Luo (see Lei Luo, et al., “3 Gb/s AC Coupled Chip-to-Chip Communication Using a Low Swing Pulse Receiver”, IEEE Journal of Solid-State Circuit, vol. 41, no. 1, pp. 287-296, January 2006, FIG. 11).
FIG. 2 is a circuit diagram of a pulse receiver using inverters each having a feedback function, which is developed for an AC coupled interface.
As shown, since a DC signal is not transmitted in the AC coupled interface, the receiver must have a self-bias function and an input pulse signal must be amplified and converted into a digital signal.
At this time, two inverters 21 and 22 have negative feedback loops composed of transistors M1 to M6. The transistors M1 to M4 are connected in a diode form and serve to restrict the output levels of the inverters 21 and 22 and to hold a bias voltage to some extent. In order to stabilize the bias voltage regardless of the width or the amplitude of the input pulse signal or a data pattern, the transistors M5 to M6 are connected to a voltage VDD such that a weak uniform feedback is applied. Transistors M7 to M9 are connected to an input terminal of a differential amplifier so as to amplify the input pulse signal and transistors M11 to M12 are cross-coupled PMOS loads and function as a latch circuit which does not requires a clock signal in order to restore the pulse signal to the digital signal. A transistor M10 is a clamping NMOS for restricting the amplitude of the output signal and sufficiently latching a signal having a small width.
Accordingly, such a receiver can convert the pulse signal into the digital signal at a high speed using the inverters 21 and 22 having the simple feedback loops while increasing the reception sensitivity.
However, since the receiver must operate using differential input signals, the receiver is not suitable for a communication channel using the human body as a single transmission line. Due to the characteristics of the inverter which operates digitally and has a restrictive feedback function, the receiver can obtain reception sensitivity of at most 120 mVpp.